Nasdaq

Synopsys IC Compiler II Delivers First-Pass Silicon Success for Graphcore's Multi-Billion Gate AI Processor

IC Compiler II, part of the Synopsys Fusion Platform, with its industry-leading capacity and throughput, accelerated implementation of the massive Colossus IPU, exceeding 59 billion transistors ...
Electronic Design

Design Compiler Points Toward Better Physical Implementation

Synopsys' Design Compiler 2010 accounts for the challenges of modern physical IC design, offering floor plan exploration from within the synthesis environment. It also delivers physical guidance to IC ...
Design-Reuse

A 55-nm Ultra Low Leakage SRAM Compiler with Optimized Power Gating Design

In this paper an optimized power gating design on a 55-nm Static Random Access Memory (SRAM) compiler is presented. Two low leakage modes: retention and sleep mode are discussed. The arrangement of ...
Design-Reuse

Synopsys Extends Industry Leadership as Customers Surpass 500 Tapeouts Using Flagship Fusion Compiler Solution

MOUNTAIN VIEW, Calif., Dec. 2, 2021 -- Synopsys, Inc. (Nasdaq: SNPS) has extended its industry leadership in digital design implementation, today announcing that customers using its flagship Fusion ...